2026

• Vignesh Adhinarayanan and Nuwan Jayasena. "The qs Inequality: Quantifying the Double Penalty of Mixture-of-Experts at Inference." arXiv preprint arXiv:2603.08960. 2026. [PDF][arXiv][TL;DR]

2025

• Vignesh Adhinarayanan, Bradford M. Beckmann, Wantong Li, Mohammad Seyedzadeh, Sergey Blagodurov, Derrick Aguren, and Hayden Hyungdong Lee. "Folded Banks: 3D-Stacked HBM Design for Fine-Grained Random-Access Bandwidth." In Proceedings of the 52nd Annual International Symposium on Computer Architecture, pp. 1819-1833. 2025. [PDF][ACM]

• Vignesh Adhinarayanan, and Wu-chun Feng. "Looking Back to Look Forward: 15 Years of the Green500." Computer 58, no. 1 (2025): 76-86. [PDF][IEEE][Computer]

2023

• Gabriel H. Loh, Michael J. Schulte, Mike Ignatowski, Vignesh Adhinarayanan, Shaizeen Aga, Derrick Aguren, Varun Agrawal et al. "A research retrospective on amd's exascale computing journey." In Proceedings of the 50th Annual International Symposium on Computer Architecture, pp. 1-14. 2023. [PDF][ACM]

2021

• Vignesh Adhinarayanan, S. Srikanth, S. Blagodurov, and D. Aguren. "Design and Analysis of HBM Architecture for Irregular Bandwidth." AMD GTAC, December 2021. Best Paper Finalist.

2020

• Vignesh Adhinarayanan. "Models and Techniques for Green High-Performance Computing." PhD Thesis, Virginia Tech, 2020. http://hdl.handle.net/10919/102990

• Vignesh Adhinarayanan, Sriseshan Srikanth, Mohammad Seyedzadeh, and Derrick Aguren. "Scaling Irregular Bandwidth with Very Fine-Grained DRAM." AMD GTAC, December 2020.

• Vignesh Adhinarayanan, and Wu-chun Feng. "Approximate Pattern Matching for On-Chip Interconnect Traffic Prediction." International Conference on Parallel Architectures and Compilation Techniques (PACT), October 2020. https://dl.acm.org/doi/10.1145/3410463.3414667

• Gregory D. Abram, Vignesh Adhinarayanan, Wu-chun Feng, David H. Rogers, and James P. Ahrens. "ETH: An Architecture for Exploring the Design Space of In-situ Scientific Visualization." IEEE International Parallel and Distributed Processing Symposium (IPDPS), May 2020. https://doi.org/10.1109/IPDPS47924.2020.00060

2018

• James Ahrens, David Rogers, Roxana Bujack, Andy Berres, Wu-chun Feng, Vignesh Adhinarayanan, Colin Ware, Francesca Samsel, Gregory Abram, and Terece Turton. "Optimizing the Energy Usage and Cognitive Value of Extreme-Scale Data-Analysis Approaches Final Report." U.S. Department of Energy, August 2018. https://www.osti.gov/servlets/purl/1546704

• Bishwajit Dutta, Vignesh Adhinarayanan, and Wu-chun Feng. "GPU Power Prediction via Ensemble Machine Learning for DVFS Space Exploration." ACM International Conference on Computing Frontiers (CF), May 2018. https://dl.acm.org/doi/10.1145/3203217.3203273

• Vignesh Adhinarayanan, Bishwajit Dutta, and Wu-chun Feng. "Making a Case for Green High-Performance Visualization via Embedded Graphics Processors." HPPAC Workshop, May 2018. https://doi.org/10.1109/IPDPSW.2018.00116

• Bishwajit Dutta, Vignesh Adhinarayanan, and Wu-chun Feng. "GPU Power Prediction via Ensemble Machine Learning for DVFS Space Exploration." Virginia Tech Technical Report TR-18-01, February 2018. http://hdl.handle.net/10919/81997

2017

• Vignesh Adhinarayanan, Wu-chun Feng, David Rogers, James P. Ahrens, and Stephen Pakin. "Characterizing and Modeling Energy for Extreme-Scale In-Situ Visualization." IEEE International Parallel and Distributed Processing Symposium (IPDPS), May 2017. https://doi.org/10.1109/IPDPS.2017.113

• Andy Berres, Vignesh Adhinarayanan, T. Turton, Wu-chun Feng, and David H. Rogers. "A Pipeline for Large Data Processing Using Regular Sampling for Unstructured Grids." LANL Technical Report, May 2017. https://permalink.lanl.gov/object/tr?what=info:lanl-repo/lareport/LA-UR-17-23903

2016

• Vignesh Adhinarayanan, Indrani Paul, Joseph L. Greathouse, Wei Huang, Ashutosh Pattnaik, and Wu-chun Feng. "Measuring and Modeling On-Chip Interconnect Power on Real Hardware." IEEE International Symposium on Workload Characterization (IISWC), September 2016. Best Paper Award. https://doi.org/10.1109/IISWC.2016.7581263

• Vignesh Adhinarayanan, B. Subramaniam, and Wu-chun Feng. "Online Power Estimation of Graphics Processing Units." IEEE/ACM International Symposium on Cluster, Cloud, and Grid Computing (CCGrid), May 2016. https://doi.org/10.1109/CCGrid.2016.93

• Vignesh Adhinarayanan, and Wu-chun Feng. "An Automated Framework for Characterizing and Subsetting GPGPU Workloads." IEEE International Symposium on Performance Analysis of Systems and Software (ISPASS), April 2016. https://doi.org/10.1109/ISPASS.2016.7482105

2015

• Vignesh Adhinarayanan, Wu-chun Feng, J. Woodring, David Rogers, and James P. Ahrens. "On the Greenness of In-Situ and Post-Processing Visualization Pipelines." HPPAC Workshop, May 2015. https://doi.org/10.1109/IPDPSW.2015.132

• Vignesh Adhinarayanan, Stephen Pakin, David Rogers, Wu-chun Feng, and James P. Ahrens. "Performance, Power, and Energy of In-situ and Post-Processing Visualization: A Case Study in Climate Simulation." SC Poster, November 2015. Best Poster Finalist. http://sc15.supercomputing.org/sites/all/themes/SC15images/tech_poster/poster_files/post275s2-file2.pdf

2014

• Vignesh Adhinarayanan, T. Koehn, K. Kepa, Wu-chun Feng, and P. Athanas. "On the Performance and Energy Efficiency of FPGAs and GPUs for Polyphase Channelization." ReConFig, December 2014. https://doi.org/10.1109/ReConFig.2014.7032542

2013

• Vignesh Adhinarayanan, and Wu-chun Feng. "Wideband Channelization for Software-Defined Radio via Mobile Graphics Processors." ICPADS, December 2013. https://doi.org/10.1109/ICPADS.2013.24

• C. del Mundo, Vignesh Adhinarayanan, and Wu-chun Feng. "Accelerating Fast Fourier Transform for Wideband Channelization." ICC, June 2013. https://doi.org/10.1109/ICC.2013.6655329

2012

• N. Venkateswaran, R. Hariharan, V. Srinivasan, R. S. Kannan, P. Thinakaran, V. Sankaran, B. Vasudevan, R. Mukundrajan, N. C. Nachiappan, A. Sridharan, K. P. Saravanan, Vignesh Adhinarayanan, and V. V. Sankaranarayanan. "SCOC IP Cores for Custom Built Supercomputing Nodes." ISVLSI, August 2012. https://doi.org/10.1109/ISVLSI.2012.80

• N. Venkateswaran, V. Srinivasan, R. S. Kannan, P. Thinakaran, R. Hariharan, B. Vasudevan, N. C. Nachiappan, K. P. Saravanan, A. Sridharan, V. Sankaran, Vignesh Adhinarayanan, V. S. Vignesh, and R. Mukundrajan. "Compilation Accelerator on Silicon." ISVLSI, August 2012. https://doi.org/10.1109/ISVLSI.2012.76